Decoding Circuitry

( The address decoder performs the function of turning on or enabling the appropriate circuitry at the critical time, so that information can be transferred back and forth between the game circuitry and the MPU. The memory map below is for the Asteroids game. If you are going to use the Automatic RAM ROM Tester, please remember to remove MPU C3 and ground the WDOG DISABLE test point. > > > > > > > > CK QA QB QC Qt> Il4 Ii 2. lb 17 D& C.YI -DACY2 t> fcCV3 -t> fc.CY4...

Rcuitry

RAM is the temporary storage space for IPU and is enabled when_ZPAGE (Zero enable) is low. When R WB (from the is low, the RAM stores the data byte in-)B0 thru DB7) at the location addressed j MPU address bus (ABO thru AB7). When is high, the MPU reads the stored data it the addressed location. signal RAMSEL, when low, has the ef-> f swapping pages 2 and 3 within the This allows greater programming flex- NOTICE TO ALL PERSONS RECEIVING THIS DRAWING CONFIDENTIAL Reproduction forbidden without...

Nd Watchdog Counter

ET LSItl CO CK COUUTER OA QB PC QD C I4 II3 I2 III Vl The NMI (non-maskable interrupt) counter causes an interrupt at the NMI input of the MPU every 4 msec. The interrupt is derived bydividing 3 KHz by a faster of 12tbrQMflh,counter C5. The inter- -mntnrru irft whan riin fi of ' - .

Mpu Circuitry

DO NOT USE SPLIT PADS ON PCB FOR TROUBLESHOOTING PURPOSES. DO NOT USE SPLIT PADS ON PCB FOR AB7 TROUBLESHOOTING PURPOSES. IF A 74LS244 IS INSTALLED AT LOCATION B2 AND OR C2, THE ABfc SpL T PAD F0R THAT LOCATION SHOULD BE FILLED WITH SOLDER. IF A 74LS241 IS USED, THE AB5 APPROPRIATE SPLIT PAD SHOULD BE OPEN. EITHER A 74LS245 OR AN AM8304B MAY BE TI(MI Co DIM UII& IDCQQ KIHT EITHER A 74LS245 OR AN AM8304B MAY BE TI(MI Co DIM UII& IDCQQ KIHT

O

Ounteri are two identical circuits. riptiodiscusseionly the X position contaiirate multipliers J8 and K8 , i E9 , mltiplexers D10, E10, and F10 , nd H1 . The output of the down up umberlhat represents the horizontal nonitoscreen or X axis , with 0 being and 108 being the far right side of the asing iis binary number output will le righbr left, respectively. The vector codes ustructions from its memory, that dta to alter the binary count of i ways. jset thse counters to an entirely...

Ram

The Ri the MPl Page en MPU is put DBC by the M R WB is byte at tl The si feet of gt RAM. Tl-ibility. The NMI non-maskable Interrupt counter causes an interrupt Kt5t 1 1 at the NMI input of the MPU every 4 msec. The interrupt is derived , , by dividing 3 KHz by a factor of 12 through counter C5. The inter- X X Xt curs when pin 6 of inverter B5 goes tow. During power-up, the NMI counter is disabled by RESET. During Self-Test, the NMI is disabled by TEST. Program Memory for the Asteroid tained in...

Regulatoraudio Pcb Schema

The Regulator Audio PCB has the dual functions of regulating the 5 VDC logic power to the game PCB and amplifying the audio from the game PCB. The regulator consists of voltage regulator Q1, current source power transistor Q3 and Q3's bias transistor Q2. The regulator accurately regulates the logic power input to the game PCB by monitoring the voltage through high impedance inputs SENSE and -SENSE. The inputs are directly from the 5 VDC and ground inputs to the game PCB. Therefore, the...

Asteroids Wiring Diagram 03515602 A

Wiring Diagran

COIN amp QO amp . cos V 30K Q AG-tAM O'ZOVOt-O AND ZO'A ZR AZAPTEfit. HAH HE S3 ASSY. v V lt S DdAf '- A. 035-2,I9-Of LEFT COiU SW ItJ.O.' CevOTtR. COIM SVJ KI.O.1 Right coiu sw in.o. TEiiT WlTcM SLAM SWITCH LEFT coihl LOCKOUT .OIL. CEUTER, COIN LOCKOUT COIL KlSHT COIN UJCKOOT JDIl_ NOT USED MOT USEDl