Lu Cs

The functional operation of the Football PCB circuitry begins naturally enough with the microprocessor (or MPU) circuitry. As you go through the various circuit descriptions, you learn how the MPU receives its sequential program instructions from its ROM memory and how it carries out these instructions through the use of its display RAM memory (Section C); how it reads in the game control switches (Section G), and how it writes or outputs the results of its instructions and calculations to the game's other PCB circuitry, such as the playfield generator (Section E), the motion object generator (Section F), and the audio amplifier (Section K).

A circuit description of the standard Atari sync generator (Section D) is also included. This is the only PCB circuitry that functions independently of microprocessor control.

All reference schematic diagrams of the aforementioned circuits are found in Appendix A at the end of this manual.

B. POWER SIJPPLT (See Figure 3-3)

The power supply produces all the necessary game voltage requirements as shown in Figure 3-4.

The PCB receives + 10 volts DC, unregulated, at pins B and 2 of the game PCB edge connector and 25 VAC to pins W, 19, X, and 20 from the secondary of the transformer located on the Type B power supply chassis.

The + 10 volts is rectified and filtered off-board and regulated on-board by the LM323 three-terminal regulator device to a stable +5 volts DC. The +5 volts DC is distributed throughout the PCB to power all logic circuits. The 25 VAC input is rectified through diodes CR1 and CR2 filtered by capacitor C62 and supplied as unregulated + 18 volts to the TDA 1004 audio amplifier. This +18 volts is also regulated by a three-terminal device 7812 to develop + 12 volts DC.


The heart of the Football game PCB is the microprocessor circuitry. A brief description of the major components and their function within the microprocessor circuitry is provided in the following paragraphs. Note that the microprocessor circuitry components include the following: (See Figure 3-5)

2. Gated address buffers (B1 and CI)

3. Data buffers (E2)

4. ROM memory (PI, N1 and Ml) for -02 version or PROM memory as listed in the PCB assembly parts list for the -01 version (refer to Illustrated Parts Catalog, Chapter 5).

5. RAM memory (M2, N2 for working RAM)

6. Address decoding circuitry (B3, E3, C7 and miscellaneous gates)

7. Watchdog reset counter (A4 and miscellaneous gates)

The microprocessor is the "master controller" behind all action that takes place in the game circuitry. In going through the following paragraphs refer to Table 3-1, MPU Input/Output Signal Descriptions. Upon initialization, the MPU (via ABS 0 - BUS 15) addresses data permanently stored in the program ROMs or PROMs. This addressed data then travels to the MPU via its 8-bit data bus (DO through D7). The MPU decodes this data to determine what action it is to perform next (i.e., "read coin switch 1," "bomb play" etc.). The MPU uses RAM memory to perform many of these instructions, namely to temporarily store information which it will later recall. The MPU is capable of writing (or putting data into) the RAM and then later reading (pulling data out of) the RAM, via its address bus (ABUS 0-ABUS 15) and bidirectional data bus (D0-D7).

Address Decoding (See Figure 3-7)

The MPU address decoding circuitry performs the critical function "of turning on or enabling the appropriate game circuitry (i.e., RAM, ROM, latches, etc.) at the appropriate time, so that information can be transferred back and forth between this game circuitry and the MPU. A memory map defining the address decoding circuit is shown in Table 3-2 as reference.

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