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T0Q1° TO OH EMITrER COLLECTOR

Figure 6-5 Motorola V Output Cin

Capacitor C32A filters horizontal frequency variations from the output bus.

Resistor R91 provides bias current for D20, and the value of R99 presents an impedance from pin 2 of IC1 to AC ground (through D20). Capacitor C46 couples high frequency voltage variations, which occur at the output bus, back to pin 3—preventing oscillations for proper operation of the reference amplifier. Resistors R92, R93, and R94 provide voltage division such that the adjustment of R93 can be set equal to the voltage of pin 2 of IC1. Resistor R95 provides bias current for D21 and also provides the + 12 volt output. Diode D23 is necessary to temperature-compensate for variations within D21. Capacitor C32B filters AC variations from the output of the full-wave bridge.

Video Amplifiers and Output (See Figure 6-5)

The composite video signal is coupled to the emitter-follower Q1 through the input connector P1 and capacitor C1. Transistor Q1 is a buffer stage which matches the impedance of the signal source to the video preamplifer and the sync separator stages. Resistor R1 is a terminating resistor for the video signal source, and resistors R2, R3, R4, and R5 form the biasing network for the stage. Capacitor C2 bypasses higher video frequencies to ground. The or Video Amplifiers and composite video signal is coupled from the emitter of Q1 to the sync separator Q10 through C33 and to the contrast control R6 through C47.

The contrast control varies the amplitude and couples the composite video signal to the base of Q2 through capacitor C3. Transistors Q2 and Q3 are complimentary, direct-coupled, common emitter amplifiers. The voltage gain (approximately 12) of the preamplifier stage is controlled by the feedback arrangement of R9, R10, R11, and R12. Resistors R7 and R8 provide the base bias voltage for Q2. Capacitor C48 is used for high-frequency peaking.

The output of the video preamplifier stage is coupled to the video output stage through capacitor C4. Diode D2 clamps the video signal to approximately + 0.7 volts (DC restoration) when a sync pulse turns on the sync amplifier Q11. The video output stage is connected in a cascade configuration. Transistor 04 is a common emitter amplifier and Q5 is connected in a common base arrangement. Capacitors C7, C8, and resistor R16 are used for high-frequency compensation, and resistor R18 controls the gain of the stage to approximately 47. Diode D3 maintains the base of Q5 at +6.2 volts, while capacitor C5 filters the video signal variations from the base voltage. Resistor R13 provides a DC bias path for D2, and R19 and D4 are used to limit the current through the CRT.

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