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The cathode driver circuit is controlled by the MRU. On every falling edge of 16V (eight times a frame). IRQ flip-flop 04 (see Figure 4-6) clocks for a low IRQ output. This output does two things, it clears the output of cathode driver latch J3, and it forces the MPU into its IRQ (interrupt request) routine.

During its IRQ routine, the MPU loads data, bits DBUSO thru DBUS3, into latch J3. LEDWR latches the MPU data bits at the output of iatch J3 and sets IRQ flip-flop D4. clearing the IRQ. If any of the latched logic bits are high, the corresponding output of buffer J4 is pulled high by one of the pull-up resistors R19 thru 21. and R24. thus turning on the corresponding transistor.

The collector of each anode driver transistor is connected to the anodes of up to four LEDs on the LED Display PCB. Anode 8, the exception, is connected to three LEDs on the LED Display PCB and the START pushbutton LED. The collector of each cathode driver transistor is connected to the cathodes of up to eight LEDs (CATHODE 4 is connected to the cathodes of up to eight LEDs (CATHODE 4 is connected to only five cathodes on the LED Display PCB and the START pushbutton LED). The result is a matrix of LEDs which the MPU can individually light by selecting any LED's cathode while its anode driver is turned on.

g. audio circuitry

There are three audio generators in the audio circuitry: I) the game sound generator, consisting of data selector/multiplexer N4, flip-flops M4 and N5. programmable counters K4 and L4. latch L3 and associated gates: 2) the bell generator, consisting of counter H6 and transistors Q15. Q17 and Q18; and 3) the bong generator, consisting of AND gate M6. All three audio generators are summed at the input of amplifier F.8. Each summed audio input is decoupled through capacitors C44 thru C48. During the attract mode, audio amplifier F.8 is disabled by the ATTRACT signal through transistor Q16.

The MPU sets up the game audio generator by latching the counter frequency data into L3. which in turn controls programmable counters K4 and L4.

Next the MPU outputs an address that results in an OUT1 output from address decoder LI. This signal allows the MPU to latch data bits DBUSO thru DBUS2 at the output of latch N3 (see Figures 4-6 and 4-7). Signals OCTAVEO thru OCTAVE2 select one of the various fre-

Figure 4-18 Audio Schematic Diagram (Part of Game PCB 030845-XX A)

quency inputs to data selector/multiplexer N4. Flip-flop M4 divides the selected frequency by a factor of three.

This frequency is then used to clock counters K4 and L4. This technique of varying the clock frequency to counters K4 and L4 allows the MPU to determine the "octave" in which the previously selected "note" is played

Th«re is no output from the game sound generator unless Ihe MPU outputs an address that results in an OUT2 signal from address decoder M3. This allows the MPU to select a volume output through data bits DBUSO thru DBUS2 (see Figures 4-6 and 4-7). Data bits VOLO thru VOL2 are applied to the inputs of AND gate M6 The outputs of the AND gate are summed at the volume control through binary-weighted summing resistors R14, R16 and R17 (voltage output through R14 is one half of output through R16 Voltage output through R16 is one half of output through R17).

The bell generator is enabled when the MPU outputs the address and data that results in a high BELL signal from latch M3. When BELL goes high, transistor Q15

conducts, resulting in the charging of capacitor C50. When C50 charges, transistor Q18 is biased on. When the BELL signal goes low, counter H6 begins to count and divides the HSYNC frequency by a factor of sixteen. With every positive pulse at the QA output of counter H6, transistor Q17 conducts. With the BELL signal low, capacitor C50 begins to discharge through resistor R39 (time constant of R39/C50 combination - 1 TC equals 1 second). The resulting output of transistor Q17 is approximately 980 Hz within a diminishing amplitude envelope

The bong generator is turned on when the MPU outputs the address and data that results in a high BONG signal from latch M3. When BONG goes high, the approximately 250 Hz output of AND gate M6 is applied to the audio amplifier through resistor R15.

Audio amplifier E8 amplifies the audio generated by the previously mentioned circuit. The amplification (or volume) is controlled by the on board volume control potentiometer. R13. The PCB audio output is also applied across a second volume control, conveniently located inside the coin door.

illustrated parts catalog

The purpose of this chapter is to provide you with the necessary information for ordering replacement parts for the Video Pinball™ game.

When ordering parts from your distributor, give the part number, part name, applicable figure number of this catalog, and serial number of your game. This will help to avoid confusion and mistakes in your order We hope the results will be less downtime and more profit from your

Figure 5-1 Final Assembly A033790-01 C

figure 5-1 Final Assembly Parts List

Item

Part Number

Qty.

Description

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